Insteekmodule-Aansluitingen - Philips Nms 8280 Computer Gebruiksaanwijzing
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L
4. INSTEEKMODULE-AANSLUITINGEN
Pin
Pin
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
a1
43
45
47
49
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17-32
49
s
50
vo
Name
Ts
o
o
cs12
-
Reserve
WAIT
1
0
Mi
0
IORG
WR
0
o
RESET
o
A9
o
A11
o
A7
o
A12
o
A14
o
A1
o
A3
o
A5
vo
Di
vo
D3
vo
D5
vo
D7
GND
=
-
GND
-
+5V
-
+5V
SOUNDIN
1
Content
Name
c3i
ROM
cs2
ROM
€512
ROM
SLTSL
Slot
Reserve
Reserved
Refresh cycle signal
RFSH
1
CPU's
WAIT
Interrupt
INT
Signal expressing
BUSDIR
This signal controls direction
Cartridges
—
cartridge at data transmission time
IORQ
VO
MERG
Memory
Write
WR
Read timing signal
RD
RESET
System reset signal
Reserved
Reserve
A15
Address
A0
a
Pin
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
addresses
4000
—
addresses
8000
—
addresses
4000
—BFFF
select
signal
line
use
signal
—
request
signal
WAIT
signal to
request
CPU
are
selected and
request
signal
signal
request
timing signal
line
signal
use
—
bus signals
1
_
2
2
4
6
8
Reserve
A15
A10
A6
A8
A13
AO
A2
A4
DO
D2
D4
D6
CLOCK
Sswi
sw2
+12V
—12V
select
signal
7FFF
select
signal
BFFF
select
(for
signal
inhibited
CPU
fetch cycle
external data
of
is
level
output
inhibited
vo
o
o
0
1
1
0
0
-
o
o
o
o
o
o
o
o
vo
vo
vo
vo
o
-
-
—
-
256k
ROM)
bus
buffer
each
from
49
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