Philips VG 8020 Gebruiksaanwijzing pagina 147
Inhoudsopgave
4
Aansluitingen
cs
cs12
Reserve
WATT
mi
IORG
WR
RESET
A9
AN
AT
A12
A14
Al
A3
A5
DI
03
05
07
GND
GND
+5V
LSV
SOUNDIN
€s1
€82
€512
SLTSL
Reserve
RESH
WAIT
INT
MI
BUSDIR
IOR
MERG
WR
RD
RESET
Reserve
A15
AO-
00
D7
GND
CLOCK
GND
SWI, SW2
+sV
+12V
SOUNDIN
—12V
145
connectors
voor insteekmodules
vo
Pin
°
°
-
1
°
10
°
12
°
14
°
16
°
18
°
20
0
22
0
24
°
26
°
28
°
32
°
32
4
vo
vo
36
3
vo
vo
"0
-
42
4
S
-
46
48
50
1
Content
4000
000
addresses
4000
ROM
Slot select
signal
ine
Reserved signal
use inhibited
Refresh cycle signal
CPU's
request signal
WATT
request signal
Interrupt
expressing
CPU
Signal
controls
direction
This signal
Cartridges are selected and
cartridge at data transmission
VO
request signal
request signal
Memory
Write timing
signal
signal
Read timing
System reset signal
Reserved
signal line
use
Address bus signals
bus
Data
signals.
ground
Signal
clock
(CPU
3.579545MHz
ground
Signal
insertion/removal
protect
For
+5V
source
power
source
+ 12V
power
Sound input signal
(-
Sbdm)
source
12V
power
—
Name
€s2
2
SLTSL
4
RESH
5
8
INT
BUSDIR
MERG
RD
Reserve
A15
A10
A6
A8
A13
A0
A2
A4
Do
02
Da
D6
cLock
SWI
SW2
+12
12
FFF
signal
select
BEFF
signal
select
select
(for
256k
-BFFF
signal
to CPU
etch
cycle
data
bus butter
of external
is
each
output
from
level
L
time
inhibited
vo
°
°
°
ï
1
°
°
-
°
°
°
°
°
°
0
vo
vo
vo
vo
°
-
-
-
-
ROM)
Inhoudsopgave
